中频数字接收机的优化设计与FPGA实现  

Optimization design and FPGA-based implementation of intermediate frequency digital receiver

作　　者：高博 周晓乐 耿双利 曲韩宾 邢浦旭 GAO Bo;ZHOU Xiao-le;GENG Shuang-li;QU Han-bin;XING Pu-xu(North-China Integrated Circuit Co., Ltd, Shijiazhuang 050000, China)

机构地区：[1]河北新华北集成电路有限公司,河北省石家庄050000

出　　处：《中国集成电路》2019年第1期33-38,77,共7页China lntegrated Circuit

摘　　要：本文对中频数字接收机进行优化设计,显著节约硬件资源。中频数字接收机对数字中频信号进行数字下变频处理,然后提取信号特征量。通过合理选择采样频率,简化下变频运算;通过调整抽取和滤波运算的顺序,避免无效滤波运算;利用FIR滤波器系数对称性,采用基于串并结合的分布式算法的流水线结构实现滤波运算;采用基于CORDIC算法的流水线结构提取信号瞬时特征量;采用N点求平均法,降低噪声对信号幅值和频率的影响;在硬件芯片上进行验证,表明设计方案正确性。本设计具有广泛的波形适应性和可扩展性,为进一步分析信号奠定基础。This paper optimizes the design of the intermediate frequency(IF)digital receiver and saves the hardware resources remarkably. It completes digital down-conversion of digital intermediate frequency signal, and extracts signal characteristics. The transformation frequency operation is simplified by reasonably selecting the sampling frequency. Invalid filtering operation is avoided by adjusting the order of decimation and filtering operation. By using the summetry of FIR filter coefficients, the pipeline structure based on serial-parallel distributed alogrithm(DA)is used to realize filtering operation. The instantaneous characteristic of the signals is extracted by using the pipeline structure based on CORDIC alogrithm. The N-point averaging method is used to reduce the effect of noise on amplitude and frequency of signals. The verification on hardware chip shows that the design is reasonable. This design has a wide range of waveform adaptablity and scalability and lays the foundation of furtuer analysis of signals.

关 键 词：数字下变频 抽取滤波 分布式算法 CORDIC 瞬时特征量 

分 类 号：TN851[电子电信—信息与通信工程] TN791