基于异构多核环境下的核间通信机制设计与实现  

Design and implementation of inter-core communication based on heterogeneous multicore environment

作　　者：周楠 王仁 覃依漪 张杨[1] 冯帆 ZHOU Nan;WANG Ren;QIN Yi-yi;ZHANG Yang;FENG Fan(Institute 706,Second Academy of China Aerospace Science and Industry Corporation,Beijing 100854,China)

机构地区：[1]中国航天科工集团第二研究院706所,北京100854

出　　处：《计算机工程与设计》2019年第3期887-893,I0001,共8页Computer Engineering and Design

摘　　要：为改善异构多核环境下核间通信效率,实现处理器性能的最优化,提出一种适用于异构多核环境下的分层结构的核间通信机制。对核间通信机制的体系结构进行概述,阐明会话层、传输层的具体含义及其层间交互关系;在此基础上提出应用于会话层与传输层的协议,依据协议完成通信机制的具体实现。在ARM+DSP异构多核平台上进行实验测试,测试结果表明了该机制的可行性与有效性。To improve the efficiency of inter core communication in heterogeneous multicore environment and to optimize the performance of the processors, an inter-core communication mechanism for heterogeneous multi-core environment was proposed. The architecture of inter core communication mechanism was summarized, and the specific meaning of session layer and transport layer and its interlayer interaction were clarified. On this basis, a protocol applied to session layer and transport layer was proposed, and the implementation of communication mechanism was completed according to the protocol. Results of experimental tests on ARM+DSP heterogeneous multi-core platform verify the feasibility and effectiveness of the inter-core communication mechanism.

关 键 词：异构多核处理器 核间通信 ARMCortex-A9 TMS320C6678 低延时 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]