基于模拟预失真的2.4 GHz CMOS功率放大器设计  

Design of 2.4 GHz CMOS power amplifier based on analog predistortion

作　　者：徐乐 陶李 刘宏[1,2] 田彤 XU Le;TAO Li;LIU Hong;TIAN Tong(Shanghai Institute of Microsystem and Information Technology,Chinese Academy of Sciences,Shanghai 200050,China;University of Chinese Academy of Sciences,Beijing 100049,China)

机构地区：[1]中国科学院上海微系统与信息技术研究所,上海200050 [2]中国科学院大学,北京100049

出　　处：《传感器与微系统》2019年第3期63-66,共4页Transducer and Microsystem Technologies

基　　金：上海经信委资金资助项目(13XI-32);国家科技重大专项项目(2011ZX02506-004)

摘　　要：基于65 nm互补金属氧化物半导体(CMOS)工艺,设计一种2. 4 GHz的两级全差分功率放大器。通过采用片上变压器实现单端信号和差分信号之间的转换和输入输出阻抗匹配和将驱动级作为预失真器的模拟预失真技术提高线性度,从而实现高增益、高集成度和高线性度的功率放大器芯片。芯片面积为1. 08 mm×1. 37 mm。仿真结果表明:在2. 4 GHz的工作频点,功率放大器的-1 d B输出功率为22. 9 d Bm,功率附加效率为23. 5%,小信号增益为27. 2 d B,三阶交调失真为-35. 6 d Bc。A 2.4 GHz two-stage fully differential power amplifier based on 65 nm complementary metal-oxidesemiconductor(CMOS)technology is designed.The power amplifier uses on-chip transformer to realize the conversion between single-end signals and differential signals and impedance matching of input and output and uses the analog predistortion technology that takes the drive stage as predistorter to enhance linearity,so as to achieve high gain,high integration and high linearity chip of power amplifier.The chip area is 1.08 mm×1.37 mm.Simulation result shows that the power amplifier achieves the-1 d B output power of 22.9 d Bm,the power add efficiency of 23.5%,the small signal gain of 27.2 d B,and the third-order inter-modulation distortion of-35.6 d Bc at the operating frequency of 2.4 GHz.

关 键 词：互补金属氧化物半导体功率放大器 片上变压器 模拟预失真 高线性度 

分 类 号：TN432[电子电信—微电子学与固体电子学]