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作 者:陈杰[1] 沙玉龙 CHEN Jie;SHA Yu-long(Suzhou Vocational University,Suzhou Jiangsu 215104,China)
出 处:《科技视界》2019年第7期23-24,共2页Science & Technology Vision
摘 要:逻辑分析仪能够对多路的数字信号进行逻辑波形显示,比较逻辑关系,便于监控数字系统的运行情况,分析数字系统的故障等。本文以STM32F103ZET6芯片为核心,构建逻辑分析采集系统,将输入的8路数字信号转换为两路模拟信号,利用常见的示波器作为显示单元,完成简易逻辑分析仪的设计。本设计适用于1MHz级以内的各种逻辑电平的数字信号显示、分析和存储,结构简单,性能稳定。Logic analyzer can display multi-channel digital signals at the same time, compare logical relations, monitor the operation of the digital system and analyze the fault logic relationship of the digital system. This system takes STM32F103ZET6 chip as the core, constructs a logic analysis acquisition system, converts 8 digital signals into two analog signals, and uses common oscilloscopes as display units to complete the design of a simple logic analyzer. This design is suitable for digital signal display, analysis and storage of all kinds of logic levels within 1MHz. It has simple structure and stable performance.
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