基于AXI总线的H.264解码器存储管理接口设计  

Design of H.264 Video Decoder Memory Controller Interface Based on AXI Bus

作　　者：王婷[1] 田泽[1,2] 张骏 韩立敏[1,2] WANG Ting;TIAN Ze;ZHANG Jun;HAN Li-min(Xi'an Aeronautics Computing Technique Research Institute,AVIC,Xi'an 710068,China;Integrated Circuit and Microsystem Design Key Laboratory of Aviation Science and Technology,AVIC,Xi'an 710068,China)

机构地区：[1]航空工业西安航空计算技术研究所,陕西西安710068 [2]集成电路与微系统设计航空科技重点实验室,陕西西安710068

出　　处：《航空计算技术》2019年第3期92-94,102,共4页Aeronautical Computing Technique

基　　金：国家科技重大专项项目资助(2016ZX01012101)

摘　　要：H.264解码器解码过程中产生的宏块类型多样、数据量大,缓存复杂度大大增加,存储管理接口连接H.264解码器和外部存储,是H.264解码系统的关键模块。基于AXI总线的H.264解码器存储管理接口设计依据H.264解码器数据格式特征和AXI总线传输特点,对多路读写通路采用轮询仲裁,并以宏块对为单位存储宏块数据,减少对总线的请求次数。经仿真验证,该接口能够完成解码器和外存之间多类型、大数据量交互,满足400MHz频率下1920×1080分辨率视频解码所需要的数据传输能力。H.264 video decoder need store enormous and multi-type macroblock data in decoding,greatly increasing the complexity of storage.As the brige of H.264 video decoder and external storage,memory controller interface play a vital role.According to the decoder data format and the feature of advanced extensible interface,this essay proposes the design of H.264 video decoder memory controller interface based on AXI bus.This interface arbitrates the multi-channel read and write control which decoder output by roll poling,and stores macroblock data in units of double macroblock,which reduces requests to the bus.The simulation results show this memory controller interface can effectively solves the storage pressure between the decoder and external storage,and the data transmission capability requirement of decoder had been completely satisfied for 1 920×1 080 resolution under 400 MHz.

关 键 词：H.264解码器 存储管理接口 AXI总线 宏块 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]