一种基于CUDA的截断重叠维特比译码算法  

Truncated overlap scheduling Viterbi decoding algorithm based on CUDA

作　　者：李晨杰 王志旭[1] Li Chenjie;Wang Zhixu(College of Telecommunications & Information Engineering, Nanjing University of Posts & Telecommunications, Nanjing 210003, China)

机构地区：[1]南京邮电大学通信与信息工程学院

出　　处：《计算机应用研究》2019年第6期1828-1830,1835,共4页Application Research of Computers

摘　　要：为解决信道译码在高吞吐量通信系统中的瓶颈问题,通过对CUDA并行计算的了解和对维特比译码并行实现的探索,为卷积码提出了一种基于CUDA的截断重叠维特比译码器。算法通过截断式的子网格图相互重叠的方式,并行执行独立的正向度量计算和回溯过程。实验结果表明,在保证了译码算法误码率性能的同时,获得了良好的吞吐量提升表现,相比现有的实现方式提升了1.3~3.5倍,降低了硬件开销,能够有效运用于实际高吞吐量通信系统中。In order to solve the bottleneck problem of channel decoding in high-throughput communication systems, this paper proposed a truncated overlap Viterbi decoder based on CUDA for convolutional codes to solve it by analyzing of parallel processing based on compute unified device architecture (CUDA) and exploring of the parallel implementation of Viterbi decoding. The algorithm performed both independent forward metrics computing and back-track procedure in parallel through the overlapping of truncated sub-grid. The experiment shows that the method keeps low BER, achieves a performance improvement of 1.3~3.5 times of the existing implementation and reduces hardware consumption. It can be effectively used in practical high-throughput communication systems.

关 键 词：卷积码 维特比译码 并行计算 计算机统一设备架构 

分 类 号：TP301.6[自动化与计算机技术—计算机系统结构]