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作 者:张骁竣 季昊 聂笔剑 Zhang Xiaojun;Ji Hao;Nie Bijian(Cambricon Technologies Co.,Ltd.,Shanghai 201203,China;Cadence Design Systems,Inc.,Shanghai 200000,China)
机构地区:[1]上海寒武纪信息科技有限公司,上海201203 [2]上海楷登电子科技有限公司,上海200000
出 处:《电子技术应用》2019年第8期53-60,共8页Application of Electronic Technique
摘 要:在先进工艺节点下,鳍式场效应晶体管(FinFET)工艺相对于平面技术提供了在功耗、性能与面积上的优势。但相对地,FinFET也会引起局部晶体管电流密度的骤增的问题,这也意味着信号线和电源地网络的金属电迁移可靠性会受到更大的冲击。随着FinFET的热分布对互联金属线的温度影响上升,电迁移失效概率上升的次级效应也由之产生。如今,热效应的影响已经成为了广大设计公司不得不考虑的因素之一,在生产商的引导之下,CadenceVoltus提供了针对热效应带来影响的精准、强大并且灵活的解决方案。基于此点对高平均翻转率的芯片进行热效应影响的检查与分析,并且对电源的结构规划和设计的物理实现进行改进。In advanced node, FinFET processes provide power, performance, and area benefits over planar technologies. But a vexing problem aggravated by FinFET is the greater local device current density, which translates to an increased concern for signal and power rail metal electromigration reliability failures. There is a critical secondary effect, as well the thermal profile of the FinFET influences the temperature of the metal interconnect neighborhood, which accelerates the EM failure rate probability. For now, the thermal impact has been broadly mentioned in the sight of design house. Following foundary′s user guide, Cadence Voltus provides an accurate, powerful and flexible solution. Based on it, we want to check the impact of thermal on high datablock and do more investigation to improve the power planning structure.
分 类 号:TN402[电子电信—微电子学与固体电子学]
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