Design and offline processing of an ultrafast digitizer based on internal cascaded DRS4  

作　　者：Ya-Fei Du Jun Wu Chen Yuan Bo Yang Cen-Ming Ye Chuan-Fei Zhang Yi-Nong Liu 

机构地区：[1]Department of Engineering Physics,Tsinghua University,Beijing 100084,China [2]Institute of Nuclear Physics and Chemistry,China Academy of Engineering Physics,Mianyang 621999,China

出　　处：《Nuclear Science and Techniques》2019年第8期35-41,共7页核技术（英文）

摘　　要：In this paper, we present an ultrafast digitizer utilizing the DRS4 switched capacitor array applicationspecific integrated circuit to achieve an ultrafast sampling speed of at most 5 GS/s. We cascaded all eight channels(sub-channels) of a single DRS4 chip for increased storage depth. The digitizer contains four DRS4 chips, a quadchannel analog-to-digital converter,a controlling fieldprogrammable gate array, a PXI interface, and an SFP+connector. Consequently, each DRS4 channel has a depth of 8192 points and a vertical resolution of 14 bits. The readout sequences should be broken into several segments and then reordered to obtain the correct sequential data sets, and this offline procedure varies in different readout modes. This paper describes the design and implementation of the hardware;in particular, the respective processing procedures are described in detail. Furthermore, the offset error is calibrated and corrected to improve the precision of the captured waveform in both single-channel and highresolution modes.In this paper, we present an ultrafast digitizer utilizing the DRS4 switched capacitor array applicationspecific integrated circuit to achieve an ultrafast sampling speed of at most 5 GS/s. We cascaded all eight channels(sub-channels) of a single DRS4 chip for increased storage depth. The digitizer contains four DRS4 chips, a quadchannel analog-to-digital converter,a controlling fieldprogrammable gate array, a PXI interface, and an SFP+connector. Consequently, each DRS4 channel has a depth of 8192 points and a vertical resolution of 14 bits. The readout sequences should be broken into several segments and then reordered to obtain the correct sequential data sets, and this offline procedure varies in different readout modes. This paper describes the design and implementation of the hardware; in particular, the respective processing procedures are described in detail. Furthermore, the offset error is calibrated and corrected to improve the precision of the captured waveform in both single-channel and highresolution modes.

关 键 词：ULTRAFAST DIGITIZER DRS4 CASCADE READOUT 

分 类 号：TL[核科学技术]