基于FPGA的高频动态编码信号采集存储系统设计  

Design of High Frequency Dynamic Coded Signal Acquisition and Storage System Based on FPGA

作　　者：张鹏[1] 谢锐[1] 殷俊红 ZHANG Peng;XIE Rui;YIN Jun-hong(National Key Laboratory for Electronic Measurement Technology,Key Laboratory of Instrumentation Science & Dynamic Measurement of Ministry of Education,North University of China,Taiyuan 030051,China)

机构地区：[1]中北大学电子测试技术国家重点实验室仪器科学与动态测试教育部重点实验室

出　　处：《自动化与仪表》2019年第9期33-36,共4页Automation & Instrumentation

基　　金：山西省应用基础研究计划-青年科技研究基金项目(201701D221122)

摘　　要：为实现对高频编码数据的快速精确采集,考虑其使用环境冲击大、空间小、频率高等特点,该文研制新型采集存储电路系统。在介绍系统组成结构和基本工作原理的基础上,针对高频信号特征,对其进行幅值衰减,信号差分化以减小误差,提高抗扰能力。再对高速A/D和高速eMMC以及主控FPGA进行选型,并详细讨论了系统电路原理设计。实验结果表明,本系统采样率可达500Msps,且精确度高、稳定性好、抗扰能力强,满足设计要求,可推广应用。In order to realize fast and accurate acquisition of high frequency coded data,considering its features of large environmental impact,small space and high frequency,a new acquisition and storage circuit system is developed in this paper. On the basis of introducing the system structure and basic working principle,according to the characteristics of the high frequency signal,the amplitude attenuation and signal differential differentiation are carried out to reduce the error and improve the anti-interference ability. Then the high speed A/D,high speed eMMC and main control FPGA are selected,and the circuit principle design of the system is discussed in detail. The experimental results show that the sampling rate of the system is up to 500 Msps,with high accuracy,good stability and strong anti-disturbance ability,which meets the design requirements and can be widely used.

关 键 词：高速采集 FPGA 高速A/D eMMC 

分 类 号：TN98[电子电信—信息与通信工程]