哈夫曼编码系统优化设计及其FPGA硬件实现  

Optimization design technology on Huffman encoding system-oriented FPGA hardware implementation

作　　者：李东泽 Li Dongze(School of Science and Credit Software,Shenyang normal University,Shenyang Liaoning,110034)

机构地区：[1]沈阳师范大学科信软件学院

出　　处：《电子测试》2019年第14期84-85,79,共3页Electronic Test

摘　　要：针对人工智能背景下海量存储与大数据处理需求,本文提出面向FPGA硬件实现的哈夫曼编码系统优化设计方法。实验结果表明,提出的哈夫曼编码技术在最大程度上提高硬件系统的存储空间利用率和编码速度,排序模块与编码模块并行工作方式更利于FPGA系统实现,该编码技术可推广到人工智能芯片设计中。Aiming at the requirement of mass storage and big data processing under the background of artificial intelligence, this paper presents an optimized design method of Huffman coding system oriented to FPGA hardware implementation. The experimental results show that the proposed Huffman coding technology improves the storage space utilization and coding speed of the hardware system to the maximum extent, and the parallel operation mode of sorting module and coding module is more conducive to the implementation of FPGA system. The coding technology can be extended to artificial intelligence chip design.

关 键 词：哈夫曼编码 FPGA硬件实现 数据压缩 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]