基于FPGA的I2S转AES/EBU音频转换系统的设计  

Design of I2S to AES/EBU Audio Conversion System Based on FPGA

作　　者：钱坤 杨秀芝[1] 郑明魁[1] 杜伟庆[1] QIAN Kun;YANG Xiuzhi;ZHENG Mingkui;DU Weiqing(College of Physics and Information Engineering,Fuzhou University,Fuzhou 350116,China)

机构地区：[1]福州大学物理与信息工程学院

出　　处：《电子器件》2019年第4期984-989,共6页Chinese Journal of Electron Devices

基　　金：福建省科技重大专项项目(2014HZ0003-3);福建省教育厅中青年教育科研项目(JAT170083)

摘　　要：为给数字广播电视设备提供附加有音频状态信息的AES/EBU数字音频接口,研究一种采用FPGA将I2S音频数据转换为AES/EBU音频格式的实现方法。该实现方法中采用硬件描述语言Verilog HDL获取音频数据和音频状态信息,并根据设定的计数单元重组成AES/EBU数字音频格式,最终经过BPM编码输出传输线型格式数据。系统设计通过逻辑功能仿真和硬件测试,输出信号均符合标准规定。In order to provide digital broadcast television equipment with AES/EBU digital audio interface that attaches audio status information,an implementation method for converting I2S audio data into AES/EBU audio format by using FPGA is studied.The hardware description language Verilog HDL is used to obtain audio data and audio state information,the set counting units are utilized to recompose into an AES/EBU digital audio format,and transmission line data are output through BPM encoding.The logical function simulation and hardware test of this system are completed;the output signals are in compliance with the standard.

关 键 词：数字音频 AES/EBU BPM编码 FPGA 

分 类 号：TN934.3[电子电信—信号与信息处理] TP331.1[电子电信—信息与通信工程]