基于分组传送网的SDH伪线仿真设计与实现  

Design and implementation of SDH pseudo wire emulation based on PTN

作　　者：邱帆[1] 李博[1] 郑乐 罗广军[1] QIU Fan;LI Bo;ZHENG Le;LUO Guangjun(The 34th Research Institute of CETC,Guilin Guangxi 541004,China)

机构地区：[1]中国电子科技集团公司第三十四研究所

出　　处：《光通信技术》2019年第10期53-56,共4页Optical Communication Technology

摘　　要：为实现分组交换网络与现存的电路交换网络兼容,伪线仿真技术提供了一套有效的连接方案。针对分组交换网络上的时分复用(TDM)业务透传需求,在现场可编程门阵列(FPGA)上设计并实现了一种基于分组传送网(PTN)的具备多通道融合、自适应时钟恢复和支持多种边缘到边缘伪线仿真(PWE3)协议的同步数字体系(SDH)伪线仿真方案。实验结果表明:该方案具有更高的恢复时钟精度,在非结构化封装且±50 ppm、0 ppm频偏下SDH输出信号最大频偏为0.3 ppm,在结构化封装下对外输出频偏为0 ppm;支持155 Mb/s、622 Mb/s速率自适应调整;具有高可靠性,误码率优于1.0E-9。In order to realize compatibility between packet switching network and existing circuit switching network,pseudo-line simulation technology provides an effective connection scheme.To meet the demand of transparent transmission of time division multiplexing(TDM)services in packet switched networks,a synchronous digital architecture(SDH)pseudo-line simulation scheme based on field programmable gate array(FPGA)with multi-channel fusion,adaptive clock recovery and support of multiple edge-to-edge pseudo-line simulation(PWE3)protocols is designed and implemented on a packet transmission network(PTN).Experiments results show that the scheme has higher recovery clock precision,the maximum deviation of SDH output signal is 0.3 ppm under unstructured packaging with±50 ppm and 0 ppm frequency offset,and the frequency offset is 0 ppm under structured packaging;it supports 155 Mb/s and 622 Mb/s rate adaptive adjustment;it has high reliability,and the error rate is better than 1.0E-9.

关 键 词：分组传送网 同步数字体系 伪线仿真 

分 类 号：TN929.11[电子电信—通信与信息系统]