对数字电路中逻辑芯片相互通讯时的时序问题探讨  

Discussion on Timing Problem of Logic Chips Communicating with Each other in Digital Circuits

作　　者：刘艳萍[1] 昝国平[1] LIU Yanping;ZAN Guoping(Shanxi Polytechnic College,Taiyuan 030006,China)

机构地区：[1]山西职业技术学院

出　　处：《太原师范学院学报（自然科学版）》2019年第3期73-77,共5页Journal of Taiyuan Normal University:Natural Science Edition

摘　　要：数字逻辑电路的设计是一个较为复杂的过程,设计思路不仅要符合逻辑关系,还要考虑诸多实际因素,其中逻辑芯片之间在互相连接、互相通讯时出现的时序问题是我们不能忽略的一个方面.文章以实训室已实现的几个典型电路为例,详尽阐述了电路中确实存在的时序问题、产生原因及解决办法,这为以后设计实用性更强的电路奠定了实践基础.The design of digital logic circuit is a complicated process.Thecircuit design should not only accord with logical relations,but also consider many practical factors.Among them,the timing problem is an aspect that we can not ignore when the logic chips are connected and communicate with each other.This paper takes several typical circuits as examples and they have been realized in thetraining room.It describes the timing problems,causes and solutions detailedly.It laid a practical foundation for the design of more practical circuits in the future.

关 键 词：逻辑芯片 时序 实践 

分 类 号：TN791[电子电信—电路与系统]