用于图像处理的FPGA存储器优化分配  

Optimized FPGA memory allocation for image processing

作　　者：陈凯峰 梁鉴如[1] CHEN Kai-feng;LIANG Jian-ru(School of Electrical and Electronic Engineering,Shanghai University of Engineering Science,Shanghai 201620,China)

机构地区：[1]上海工程技术大学电子电气工程学院

出　　处：《计算机工程与科学》2019年第11期1924-1929,共6页Computer Engineering & Science

基　　金：国家自然科学基金(61272097);上海市科技委员会重点项目(18511101600)

摘　　要：现场可编程门阵列(FPGA)在计算机视觉应用领域有着广阔的前景,然而FPGA有限的片上存储器资源难以满足应用场景下性能、尺寸和功率的需求。针对这个问题,研究片上存储器的资源分配,在最小化片上资源使用和整体功耗的前提下提出一种易于实现的分区平衡算法。实验结果表明,与商用FPGA高级综合工具相比,本文算法的利用率提高达60%,且动态功耗降低了约70%。在高级算法MeanShift跟踪的实验中,实验结果显示,分区算法可以在不影响关键性能的前提下降低总功耗高达30%。Field Programmable Gate Array(FPGA)has broad prospects in computer vision applications.However,limited memory resources of FPGA are difficult to meet the performance,size and power requirements of the application scenarios.To solve this problem,this paper studies the resource allocation of on-chip memory,designs a partition balancing algorithm to minimize resource usage and power consumption,and implements it on the platform.The experimental results show that,compared with the commercial FPGA's advanced synthesis tools,the proposed algorithm improves the utilization rate by 60%and reduces the dynamic power consumption by up to 70%.In the experiment of the advanced algorithm MeanShift tracking,the experimental data shows that the partition balancing algorithm can reduce the total power consumption by up to 30%without affecting the key performance.

关 键 词：FPGA 图像处理 片上存储器 功耗 分区算法 

分 类 号：TN492[电子电信—微电子学与固体电子学]