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作 者:赵宏亮 蒲佳 刘树凯 何善亮 ZHAO Hongliang;PU Jia;LIU Shukai;HE Shanliang(Chengdu CORPRO Technology CO.,LTD,Chengdu,610041,CHN)
机构地区:[1]成都振芯科技股份有限公司
出 处:《固体电子学研究与进展》2019年第5期375-380,共6页Research & Progress of SSE
摘 要:提出了一种新的前台校准技术,并将其用在了一款16位电流舵D/A转换器(DAC)的设计中。通过对DAC每一位电流源的输出结果经过校准ADC采样存储后,使用所设计的移位比较方法确定最终的最高位标准值(MSB),然后利用校准ADC和比较电路,按照逐次逼近原则确定每一位电流源需要的补偿量,并通过校准电流源阵列对主DAC的电流源进行电流补偿,从而提高DAC的静态线性度和动态特性。介绍了电流舵DAC中电流源阵列产生失配的原理,给出了一种新的校准方案以及具体的实现方法。采用SMIC 65 nm CMOS工艺设计制作了含有该校准电路的16位电流舵DAC,测试结果表明,该校准方案可有效提高DAC芯片的静态线性度和动态特性。开启校准后,在25℃的条件下,DNL为0.8 LSB,INL为2.1 LSB,在10 MHz输出信号下的杂散为78.5 dB。A new foreground calibration technique was presented,which was designed in a 16 bit current steering D/A converter(DAC).After calibrating ADC samples and storing the output results of each bit current source of DAC,the presented shift comparison method was used to sure the value of MSB.Then,through calibration ADC and comparator,the sum of compensations for each current source was ensured by following the principle of successive approximation.The current source of the main DAC was compensated by calibrating the current source array,thus improved the static linearity and dynamic characteristics of the DAC.The principle of the current source array mismatch in current steering DAC was introduced,and a new designed calibration technique and specific implementation method was provided.The 16 bit current steering DAC including the calibration technique was designed and fabricated in SMIC 65 nm CMOS technique.The test results show that the foreground calibration technique can improve the static linearity and dynamic performance.After calibration circuit is opened,at 25℃,it performs DNL of 0.8 LSB,INL of 2.1 LSB,the SFDR of 78.5 dB at 10 MHz output signal.
分 类 号:TN432[电子电信—微电子学与固体电子学]
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