一种适用于FPGA应用的高效高速缓存压缩方法  

An Efficient Cache Compression Method for FPGA Applications

作　　者：苏迪 杨帆[1] 陶俊[1] 曾璇[1] SU Di;YANG Fan;TAO Jun;ZENG Xuan(State Key Laboratory of ASIC&Systems,Fudan University,Shanghai 201203,China)

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室

出　　处：《复旦学报（自然科学版）》2019年第5期634-641,共8页Journal of Fudan University：Natural Science

摘　　要：缓存压缩技术在计算机体系结构领域的应用日臻成熟.然而,因为现场可编程门阵列(FPGA)应用程序运行过程中对存储器的访问更规则,所以现有的计算机缓存压缩技术直接用于FPGA效率不高.本文提出了一种新颖的适用于FPGA的快速在线数据压缩的页式高速缓存压缩方法.该方法可以将数据压缩为标准大小的高速缓存行,避免了其他缓存压缩技术压缩数据后导致的内存碎片化问题.此外,我们还提出了一个简化的页式内存管理单元,以解决以往缓存压缩技术在新旧数据替换时空间不足的问题.实验结果表明:我们的页式高速缓存消耗硬件资源少,能够有效地压缩图像和矩阵数据,同时具备极低的压缩和解压缩延时的优点.Cache compression techniques based on the classic computer architecture have been widely studied in the literature.However,these existing compression technologies are not sufficiently efficient for the applications of field programmable gate arrays(FPGAs).This is because the accesses to the memories are much more regular and more coarse-grained in the FPGAs by compared to general-purpose processors.To address these issues,we propose a novel page cache compression method in this paper for fast online data compression of FPGA.By applying this method,we compress data into standard-sized blocks and,consequently,the memory fragmentation caused by directly adopting the existing compression technologies can be avoided.In addition,we propose a simplified page-memory management unit in order to address the space limitation problem during data updates.The experimental results demonstrate that the proposed method can effectively compress images and matrices with low hardware cost and low compression/decompression latency.

关 键 词：FPGA应用 页式高速缓存压缩 页式内存管理 

分 类 号：TN403[电子电信—微电子学与固体电子学]