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作 者:李源 阮成肖 Li Yuan;Ruan Chengxiao(Navy representative Office in Lianyungang 716 Institute,Lianyungang 222061,China;Jiangsu Automation Research Institute,Lianyungang 222061,China)
机构地区:[1]海军驻连云港七一六所军事代表室,连云港222061 [2]江苏自动化研究所,连云港222061
出 处:《电子测量技术》2019年第19期31-35,共5页Electronic Measurement Technology
摘 要:为了实现对雷达显示系统后端雷达信号处理板进行板级的检测、验证和调试,设计了一种基于Qsys系统的雷达信号源。采用Qsys系统软硬件协调设计方法,通过对基于Avalon总线PCI从设备IP核以及基于Avalon总线雷达信号源进行设计,与Nios Ⅱ软核处理器形成片上系统,并通过上位机软件对雷达信号源各种参数进行控制,实现一种灵活高效、可扩展、可移植的雷达信号源。该设计既满足了雷达信号处理板的测试需求,又因其软件可更改的特点,可以适应各种雷达信号应用需求。In order to realize the board level detection, verification and debugging of the radar signal processing board at the back end of the radar display system, a radar signal source based on Qsys system is designed. The design adopts the Qsys system hardware and software coordination design method, through the design of the Avalon bus PCI slave IP core and the Avalon bus radar signal source, forms a system on chip with the Nios Ⅱ soft core processor. The various parameters of the radar signal source are controlled by the host computer software. It enables a flexible, efficient, scalable, and portable radar signal source. The design satisfies the testing requirements of the radar signal processing board, and can adapt to various radar signal application requirements due to its software changeable features.
关 键 词:Qsys NIOS Ⅱ软核处理器 PCI总线 AVALON总线 雷达信号源
分 类 号:TN952[电子电信—信号与信息处理]
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