0.18μm CMOS高线性低噪声混频器设计  

A High-Linearity Low-Noise Factor Mixer in 0.18 μm CMOS

作　　者：张照锋[1] 徐结海[1] 张长春[2] ZHANG Zhaofeng;XU Jiehai;ZHANG Changchun(Nanjing College of Information Technology,Nanjing 210023,China;Nanjing University of Post and Telecommunications,Nanjing 210023,China)

机构地区：[1]南京信息职业技术学院,南京210023 [2]南京邮电大学,南京210023

出　　处：《电子器件》2019年第6期1362-1366,共5页Chinese Journal of Electron Devices

基　　金：南京信息职业技术学院开放基金项目(KF20160101)

摘　　要：采用标准0.18μm CMOS工艺,设计了一种应用于超外差接收机的高线性度、低噪声系数下变频混频器。基于经典基尔伯特混频器架构,该混频器采用共栅结构跨导级提高线性度,引入电容交叉耦合技术增加跨导增益及降低噪声系数,并通过电流注入技术同时降低开关级和跨导级的噪声贡献。在1.8 V电源电压下,后仿真结果显示,该混频器消耗功耗12 mW,取得噪声系数10.75 dB,输入1 dB压缩点-1.45 dBm,达到了预期的高线性度、低噪声系数性能要求。该混频器占用面积为650μm×655μm。A high-linearity low-noise factor down-conversion mixer for a super-heterodyne receiver is designed in standard 0.18μm CMOS technology.Based on the revised topology of a classic Gilbert mixer,the common-gate transconductance stage is employed to improve the linearity,the capacitive cross-coupling technique is introduced to improve both the transconductance gain and the noise factor,and also the current injection technique is adopted to reduce the noise contributions from both the switching stage and the transconductance stage.From a single 1.8 V supply voltage,post-simulation results show that,with a power consumption of 12 mW,a noise factor of 10.75 dB and an input 1 dB compression point(IP1dB)of-1.45 dBm are achieved.Additionally,the silicon area of 650μm×655μm is occupied.

关 键 词：混频器 线性度 噪声系数 电容交叉耦合 电流注入 

分 类 号：TN43[电子电信—微电子学与固体电子学]