多片国产FPGA加载方式的探讨  

Implementation of Multichip Domestic FPGA Loading Modes

作　　者：沈佐峰[1] 梁文婷 SHEN Zuo-feng;LIANG Wen-ting(No.30 Institute of CETC,Chengdu Sichuan 610041,China)

机构地区：[1]中国电子科技集团公司第三十研究所

出　　处：《通信技术》2020年第1期245-250,共6页Communications Technology

摘　　要：现在国产现场可编程逻辑门阵列(Field Programmable Gate Array,FPGA)应用越来越广泛。由于国产芯片的局限,很多时候需要使用多片FPGA级联。同时,由于系统应用的场合不同,对加载方式有不同要求。根据应用趋势,从国产FPGA加载配置原理出发,设计提出了使用多片国产FPGA时的多种加载方式,包括JTAG加载、MCU加载及FLASH加载等,以及各种加载的具体实现过程,最后搭建了测试平台对加载方案进行测试。测试结果显示,此方案安全可行,对实际工程实现有较高的参考价值。At present,domestically produced field programmable logic gate array(FPGA)is more and more widely used.Due to the limitations of domestic chips,many times it is necessary to use multiple FPGA cascades.At the same time,due to different applications of the system,there are different requirements for the loading method.According to the application trend,starting from the loading configuration principle of domestic FPGA,a variety of loading methods are designed and proposed when using multiple domestic FPGAs,including JTAG loading,MCU loading and flash loading,as well as the specific implementation process of various loading.Then,a test platform is built to test the loading scheme.The test results indicate that this solution is safe and feasible,and has a high reference value for the actual project implementation.

关 键 词：现场可编程门阵列 级联 加载 MCU+FPGA 国产化 

分 类 号：TN924.2[电子电信—通信与信息系统]