基于FPGA的高分辨率数字脉冲信号发生器的设计与实现  

Design and implementation of high-resolution digital pulse signal generator based on FPGA

作　　者：田宇 施赛烽 郑子贤 徐南阳 TIAN Yu;SHI Saifeng;ZHENG Zixian;XU Nanyang(School of Electronic Science and Applied Physics,Hefei University of Technology,Hefei 230601,China)

机构地区：[1]合肥工业大学电子科学与应用物理学院

出　　处：《合肥工业大学学报（自然科学版）》2020年第2期224-226,258,共4页Journal of Hefei University of Technology：Natural Science

基　　金：国家自然科学基金面上资助项目(61376128)

摘　　要：文章以现场可编程门阵列(field-programmable gate array,FPGA)芯片为核心器件,同时使用同步动态随机存储器(synchronous dynamic random access memory,SDRAM)芯片作为存储元件,提出了一种基于FPGA芯片的多通道数字脉冲信号发生器的设计方案,以弥补FPGA内部随机存储器(random access memory,RAM)资源少的缺点。该方案采用直接波形发生方式生成脉冲数据,在向FPGA发送之前对该脉冲数据进行编码以减少通信流量和降低所需的存储空间,且所产生的脉冲信号的最小分辨率达到2 ns。设计集成度高,应用灵活,采用FPGA和SDRAM相结合的方式能极大地降低设计的成本,同时也可以极大地提升系统的存储能力。This paper introduces a design scheme of a multi-channel digital pulse signal generator based on the field-programmable gate array(FPGA). The FPGA chip is used as the main device. And a synchronous dynamic random access memory(SDRAM) chip is used as a command storage, instead of FPGA internal random access memory(RAM) resources. Pulse data is generated using the direct waveform generation method. The data is encoded before sending it to the FPGA to reduce the communication cost and the required memory space. The pulse signal generated by this design has a minimum resolution of 2 nanosecond(ns). This design is highly integrated and flexible in various applications. The combined use of FPGA and SDRAM greatly reduces the cost of the design with a significantly improved memory capacity.

关 键 词：现场可编程门阵列(FPGA) 多通道 脉冲 直接波形发生方式 同步动态随机存储器(SDRAM) 

分 类 号：TN782[电子电信—电路与系统] TN791