一种新型的HDB3编解码电路  

New HDB3 encoding and decoding circuit

作　　者：王雪 黄海生 姚秋瑞 WANG Xue;HUANG Haisheng;YAO Qiurui(School of Electronic Engineering,Xi’an University of Posts and Telecommunications,Xi’an 710121,China)

机构地区：[1]西安邮电大学电子工程学院,西安710121

出　　处：《光通信技术》2020年第3期52-57,共6页Optical Communication Technology

基　　金：国家自然科学基金—地区科学基金项目(61661049)资助;西安邮电大学研究生创新基金资助项目(CXJJLY2018029)资助。

摘　　要：在实际的数字基带通信系统中,为使信息在基带中顺利传输,必须将不归零码(NRZ)信号编码成适合基带传输的码元。由于在发送时发送端不发送时钟信息,但为了保证收发两端信号同步,需要在接收端从信息流中提取时钟信息来恢复数据。提出一种新型的三阶高密度双极性码(HDB3)的编解码电路,在接收端利用全数字锁相环(PLL)的原理,采用小数分频器设计一种具有环路滤波特性的数控振荡器(DCO)。经验证:在输入信号的频率范围为2.048 MHz(±70 ppm)的情况下,新型的HDB3编解码电路可以成功恢复出定时信息和数据。In the actual digital baseband communication system,in order to transmit information smoothly in the baseband,non-return to zero(NRZ)signal must be coded into code elements suitable for baseband transmission.Because the sender does not send clock information when sending,but in order to ensure the synchronization of the signal between the sender and the sender,it is necessary to extract clock information from the information stream at the receiver to recover the data.A novel encoding and decoding circuit for third-order high density bipolar code(HDB3)is proposed.The principle of all digital phase-locked loop(PLL)is used at the receiver.The decimal frequency divider is used to design a digital controlled oscillator(DCO)with loop filtering characteristics.Experiments show that the new HDB3 codec circuit can successfully recover timing information and data in the input signal frequency range of 2.048 MHz(±70 ppm).

关 键 词：光纤通信 全数字锁相环 数控振荡器 三阶高密度双极性码 位同步 

分 类 号：TN492[电子电信—微电子学与固体电子学]