一种高效的CABAC熵编码硬件设计  

An efficient CABAC entropy coding hardware design

作　　者：傅晨 郑明魁[1] 陈志峰[1] 施隆照[1] 王炎 FU Chen;ZHENG Mingkui;CHEN Zhifeng;SHI Longzhao;WANG Yan(College of Physics and Information Engineering,Fuzhou University,Fuzhou,Fujian 350108,China)

机构地区：[1]福州大学物理与信息工程学院,福建福州350108

出　　处：《福州大学学报（自然科学版）》2020年第2期174-180,共7页Journal of Fuzhou University(Natural Science Edition)

基　　金：福建省自然科学基金资助项目(2018J01801);福州大学科研启动基金资助项目(XRC-18091);晋江市福大科教园发展中心科研项目(2019-JJFDKY-13)。

摘　　要：本设计是一种以基于上下文的自适应二进制算术编码(CABAC)为熵编码的高效视频编码方案,通过(CABAC)硬件结构的输入输出模块优化和算术编码模块优化来提高整体架构的效率及主频.在输入模块优化方面,采用四级缓存输入和残差系数优化传输;在算术编码模块优化方面,通过上下文模型索引预读取、预归一化查表和并入串出码流输出设计,提高整体架构的工作效率及主频,降低资源消耗,实现高效流水线高主频硬件架构.硬件设计使用90 nm标准单元库进行综合,可在工作频率为370 MHz下实现流水线,使用电路门数为43.49×10^3.该处理速率及吞吐率可支持HEVC标准的通用测试条件下1080 P视频30帧·s^-1的实时编码.This design is a high efficient video coding scheme based on context-based adaptive binary arithmetic coding(CABAC)as the entropy coding.The overall architecture and efficiency of the main frequency are improved by the optimization of the input and output modules and the module optimization of the arithmetic coding CABAC hardware structure.In terms of input module optimization,four-level buffer input and residual coefficient transmission optimization are adopted;in terms of arithmetic coding module optimization,context model index pre-reading,pre-normalization look-up table and in-line serial stream output design are adopted so as to improve the overall efficiency of the architecture and the main frequency,reduce resource consumption,and achieve a high-frequency hardware architecture of the efficient coding pipeline.The combined results show that the pipeline can operate at 370 MHz with 43.49 K gates aiming at 90 nm process.The processing rate and throughput can support real-time encoding of 1080 P video under the general test conditions of the HEVC standard of 30 frames per second.

关 键 词：高效视频编码 熵编码 CABAC 吞吐率 硬件设计 

分 类 号：TN919.81[电子电信—通信与信息系统]