一种新型亚阈值SRAM单元设计  

A New Type of Subthreshold SRAM Bitcell Design

作　　者：孔得斌 乔树山[1] 袁甲[1] Kong Debin;Qiao Shushan;Yuan Jia(Institute of Microelctronics of Chinese Academy of Sciences,Beijing 100029,China)

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《航空科学技术》2020年第2期60-65,共6页Aeronautical Science & Technology

基　　金：航空科学基金(201743X2002)。

摘　　要：降低电源电压能够大幅降低芯片的功耗,进而减小航空电子设备的能量消耗,为使静态随机存储器能够工作在低电压下,面向亚阈值区设计了一种新型的12T存储单元。该单元通过两个堆叠的访问管完成数据的写入操作,通过一个访问管完成读操作,这样能够消除半选单元的干扰问题并使单元适用于位交织结构。并且单元的读访问路径被专用管子从真实存储节点隔离,在增加读稳定性的同时保证了充足的电压感知裕量。应用多阈值设计技术提升单元的写能力并降低漏电功耗。仿真结果表明,在0.4V电压下提出的新型12T单元相较于传统6T单元读噪声容限提升80%、写能力提升60%,相较于10T单元电压感知裕量和访问速度都获得了提升。该12T单元更适用于低压操作。Lowering supply voltage decreases chip power significantly,thus further reducing energy consumption of avionics.A new type of 12T bitcell is proposed to enable SRAM to work under low voltage.To make bit-interleaving structure feasible and eliminate half-select disturbance,the proposed cell features single-passgate and dualpassgates for reading and writing operation respectively.Additionally,the access path is decoupled by dedicated transistors from the true storage node,which both enhances the reading stability and ensures enough sensing margin.Multi-threshold voltage metric is utilized to improve writability and lower leakage consumption.Simulation results show that the proposed cell offers 1.8X Read Static Noise Margin(RSNM)and 1.6X negative Write Static Noise Margin(WSNM)compared with traditional 6T cell at 0.4V,and sensing margin and access performance are also improved compared with 10T cell.Hence,the proposed 12T cell is more suitable for low power operation.

关 键 词：低功耗 SRAM 新单元 位交织 位线漏电补偿 多阈值 

分 类 号：TN492[电子电信—微电子学与固体电子学]