FPGA最小系统的数字电源设计  

Design of digital power supply for FPGA minimum system

作　　者：刘卫华[1] 荆立雄 王建生[1] Liu Weihua;Jing Lixiong;Wang Jiansheng(Xi’an Aeronautics Computing Technique Research Institute,AVIC,Xi’an 710065,China)

机构地区：[1]航空工业西安航空计算技术研究所,陕西西安710065

出　　处：《无线互联科技》2020年第7期78-79,共2页Wireless Internet Technology

摘　　要：文章介绍了一种FPGA最小系统的数字电源设计方法。FPGA最小系统的数字电源包括FPGA端口电压、内核电压、EEPROM配置芯片内核电压等部分。对数字电源产生、软启动、上电时序控制进行了设计改进,可以有效避免数字电源设计不合理造成的FPGA最小系统工作不稳定的设计隐患,对于稳定可靠的FPGA最小系统设计具有重要意义。This paper introduces a design method of digital power supply for FPGA minimum system.The digital power supply of FPGA minimum system includes the voltage of FPGA I/O ports,kernel voltage,EEPROM configuration chip kernel voltage and so on.The design of digital power generation,soft-start and power sequence control is improved in this paper.The hidden trouble of instability caused by unreasonable digital power design could be reduced,which is significant for stable and reliable design of FPGA minimum system.

关 键 词：现场可编程逻辑门阵列最小系统 数字电源 上电时序控制 

分 类 号：TN791[电子电信—电路与系统] TN86