基于异构加速的Φ-OTDR实时信号处理系统  

Real-Time Phase-Sensitive Optical Time-Domain Reflectometry Signal Processing System Based on Heterogeneous Accelerated Computing

作　　者：盛庆华[1] 俞钊 卢斌[2] 李竹[1] 叶青[2,3] 张泽鑫 Sheng Qinghua;Yu Zhao;Lu Bin;Li Zhu;Ye Qing;Zhang Zexin(School of Electronics and Information,Hangzhou Dianzi University,Hangzhou,Zhejiang310018,China;Key Laboratory of Space Laser Communication and Detection Technology,Shanghai Institute of Optics and Fine Mechanics,Chinese Academy of Sciences,Shanghai 201800,China;Center of Materials Science and Optoelectronics Engineering,University of Chinese Academy of Sciences,Beijing100049,China)

机构地区：[1]杭州电子科技大学电子信息学院,浙江杭州310018 [2]中国科学院上海光学精密机械研究所空间激光信息传输与探测技术重点实验室,上海201800 [3]中国科学院大学材料与光电研究中心,北京100049

出　　处：《中国激光》2020年第1期136-146,共11页Chinese Journal of Lasers

基　　金：国家重点研发计划(2017YFC0307503);浙江省装备电子研究重点实验室(2019E10009);上海市自然科学基金(19YF1453400);中国科学院促进发展局项目(KFJ-STS-QYZD-084)。

摘　　要：针对相位敏感光时域反射计(Φ-OTDR)信号处理复杂、计算量大、实时性要求高的特点,提出一种基于现场可编程门阵列(FPGA)异构加速计算技术的Φ-OTDR实时信号处理系统。对外差探测式Φ-OTDR信号处理流程进行分析与分解,提出基于FPGA的滑动窗数据帧分割、多通道并行快速傅里叶变换(FFT)计算、频域滤波、短时能量求和等一系列加速计算方法。该系统最终实现在40 km光纤传感距离、2 kHz重复频率与1 m采样间隔下的长时间、实时扰动信号解调与显示,并且具有80%的帧重叠率。该FPGA系统作为异构加速器,能够减轻计算机数据处理压力,保证传感系统高重复频率下的运算实时性,为系统可靠性和稳定性提供了有效保障。A real-time phase-sensitive optical time-domain reflectometry(Φ-OTDR)signal processing system is proposed based on the heterogeneous accelerated computing technology of field programmable gate array(FPGA)with respect to the characteristics of complexity,large-amount computation,and high real-time requirements of theΦ-OTDR signal processing system.Firstly,the heterodyne-detection-typeΦ-OTDR signal processing flow is analyzed and decomposed.Subsequently,a series of accelerated computing methods based on FPGA,such as sliding window data frame segmentation,multichannel parallel fast Fourier transform calculation,frequency-domain filtering,and short-term energy summation,are proposed.Finally,the system implements long and real-time disturbance signal demodulation and display using a fiber sensing distance of 40 km,a repetition rate of 2 kHz,and a sampling interval of 1 m with a frame overlap of 80%.The FPGA system acts as a heterogeneous accelerator to mitigate the computer data processing pressure and ensure real-time operation of the sensing system at a high repetition frequency,effectively ensuring the system reliability and stability.

关 键 词：光计算 并行处理 异构加速计算 相位敏感光时域反射计 现场可编程门阵列 短时能量 

分 类 号：TP332.1[自动化与计算机技术—计算机系统结构]