AXIe信号发生器接口设计  

AXIe Signal Generator Interface Design

作　　者：许川佩[1] 张恒俊 盘书宝 XU Chuan pei;ZHANG Heng jun;PAN Shu bao(School of Electronic Engineering and Automation,Guilin University of Electronic Technology,Guilin 541004,China;College of Electronic Information and Automation,Guilin University of Aerospace Technology,Guilin 541004,China)

机构地区：[1]桂林电子科技大学电子工程与自动化学院,广西桂林541004 [2]桂林航天工业学院电子信息与自动化学院,广西桂林541004

出　　处：《仪表技术与传感器》2020年第4期40-45,共6页Instrument Technique and Sensor

基　　金：国家自然科学基金项目(61671164);桂林航天工业学院基金项目(YJ1304)。

摘　　要：AXIe总线属于新型高速仪器总线。为解决AXIe测试系统中信号发生器模块与上位机之间的数据传输问题,提出了一种符合AXIe-1.0规范的AXIe信号发生器接口方案。根据AXIe-1.0规范,选取了LAN接口作为仪器的通讯接口,并以FPGA作为设计平台,完成了AXIe信号发生器接口的设计,采用DDS技术实现了信号发生器模块。而后再通过LAN接口向信号发生器模块传输波形命令及波形数据,完成了功能验证,为AXIe模块化仪器的开发提供借鉴。The AXIe bus is a new high-speed instrument bus.In order to solve the data transmission problem between the signal generator module and the host computer in the AXIe test system,an AXIe signal interface scheme conforming to the AXIe-1.0 specification was proposed.According to the AXIe-1.0 specification,the LAN interface was selected as the communication interface of the instrument,and the FPGA was used as the design platform to complete the design of the AXIe signal generator interface.The signal generator module was implemented by DDS technology.Then,the waveform command and waveform data were transmitted to the signal generator module through the LAN interface,and the function verification was completed,which provides a reference for the development of the AXIe modular instrument.

关 键 词：AXIe-1.0规范 信号发生器 LAN接口 DDS技术 

分 类 号：TN914[电子电信—通信与信息系统]