一种超低功耗基准电压源设计  

Design of an Ultra-Low Power Voltage Reference

作　　者：闫苗苗 焦立男[1] 柳有权[1] YAN Miaomiao;JIAO Linan;LIU Youquan(College of Information Engineering,Chang’an University,Xi’an710064,P.R.China)

机构地区：[1]长安大学信息工程学院,西安710064

出　　处：《微电子学》2020年第2期171-175,183,共6页Microelectronics

基　　金：中央高校基本科研业务费专项资金资助项目(310824173401)。

摘　　要：设计了一种用于超低功耗线性稳压器电路的基准电压源,研究了NMOSFET阈值电压的温度特性。采用耗尽/增强型电压基准结构,显著降低了功耗。采用共源共栅型结构,提高了电源抑制比。设计了数模混合集成熔丝修调网络,优化了输出电压精度和温漂。电路基于0.35μm CMOS工艺实现。仿真结果表明,在2.2~5.5 V输入电压下,基准电压为814 mV,精度可达±1%。在-40℃~125℃范围内,温漂系数为2.52×10-5/℃。低频下,电源抑制比为-99.17 dB,静态电流低至27.4 nA。A voltage reference was designed for ultra-low power linear regulator circuit. In this design, the temperature characteristics of NMOSFET threshold were studied. The power consumption was significantly reduced through enhancement/depletion mode voltage reference structure. Cascode structure was used to improve the power supply rejection ratio(PSRR). A mixed-signal fuse trimming network was designed to optimize the output voltage accuracy and temperature drift. The circuit was implemented in a 0.35 μm CMOS process. The simulation results showed that the reference voltage was 814 mV in a supply voltage range from 2.2 V to 5.5 V, and the accuracy could reach ±1%. The temperature coefficient was 2.52×10-5/℃ from-40 ℃ to 125 ℃. The PSRR was-99.17 dB at low frequency, and the quiescent current of the reference reached 27.4 nA.

关 键 词：基准电压源 超低功耗 线性稳压器 电源抑制比 

分 类 号：TN432[电子电信—微电子学与固体电子学]