基于ZYNQ的千兆以太网数据包处理架构  

Gigabit Ethernet packet processing architecture based on ZYNQ

作　　者：诸俊辉 刘一清[1] ZHU Jun⁃hui;LIU Yi⁃qing(School of Information Science and Technology,East China Normal University,Shanghai 200241,China)

机构地区：[1]华东师范大学通信与电子工程学院,上海200241

出　　处：《电子设计工程》2020年第10期102-107,112,共7页Electronic Design Engineering

摘　　要：ZYNQ-7000型器件是Xilinx公司所推出的混合架构SOC(System On Chip)芯片,其内部集成了一个7系列现场可编程逻辑门阵列(Field-Programmable Gate Array,FPGA)以及一个多核ARM Cortex-A9处理核心。针对现今迅速发展的互联网技术,以及以太网数据采集、传输等应用,本文提出了一种基于ZYNQ的千兆以太网数据包处理架构。通过对以太网数据包进行分类,交由不同模块处理从而提高了处理能力。将所提出的架构应用于实际网闸设备中,并使用Spirent公司的Test⁃Center C1仪器进行RFC2544性能测试,其吞吐率可达到千兆以太网线速的99.375%且处理延时低于55μs。The ZYNQ⁃7000 device is a hybrid architecture SOC(System On Chip)from Xilinx.It integrates a 7⁃series Field⁃Programmable Gate Array(FPGA)and a multi⁃core ARM Cortex⁃A9 Processer.In view of the rapid development of Internet technology and Ethernet data acquisition and transmission applications,this paper proposes a ZYNQ⁃based Gigabit Ethernet packet processing architecture.By classifying Ethernet packets and handling them by different modules,the processing performance is improved.We apply the proposed architecture to a gateway device and perform the RFC2544 performance test,using Spirent’s TestCenter C1.The result shows that the throughput reaches 99.375%of the Gigabit Ethernet line rate and the processing delay is less than 55μs.

关 键 词：千兆以太网 ZYNQ 数据处理 Round-Robin 

分 类 号：TN393.1[电子电信—物理电子学]