接口时序一致性连续定量监测技术研究  

Research on Continuous Quantitative Monitoring Technology for Interface Timing Consistency

作　　者：高亮 宫久路[1] 谌德荣[1] Gao Liang;Gong Jiulu;Chen Derong(School of Mechatronics Engineering,Beijing Institute of Technology,Beijing 100081,China)

机构地区：[1]北京理工大学机电学院,北京100081

出　　处：《计算机测量与控制》2020年第5期31-35,40,共6页Computer Measurement &Control

摘　　要：为了解决电气系统接口时序一致性的长期连续定量监测问题,设计了一种基于对比测试的时序一致性监测系统;该系统通过建立时序参数的描述模型,将时序约束统一为约束矢量并通过图形化界面输入,约束矢量包含时序参数的测点及约束条件;将理想时序周期内同一事件下各信号的逻辑值编为事件码并按事件先后顺序排列,以事件码序列为码型触发的模式序列,基于设计的DEW-BM算法捕获与模式序列匹配的目标数据序列,并计算其中各时序参数的测量值,通过验证测量值是否满足约束不等式给出接口时序一致性的监测结果 (Pass/Fail);系统最多可实现对16路信号的同步测量与分析,单通道最大采样率为20MHz;测试结果表明,监测系统能够正确捕获目标信号,时序一致性分析结果与理论期望结果一致,监测系统具有一定的正确性和通用性。In order to solve the problem of long-term continuous quantitative monitoring of timing consistency of electrical system interface,a timing consistency monitoring system based on comparison test is designed.The system unifies the timing constraints into constraint vectors by establishing a description model of timing parameters,and inputs them through a graphical interface.The constraint vector contains the measurement points and constraints of the timing parameters.The logical values of each signal under the same event in the ideal timing cycle are encoded as event codes and arranged in the order of events.Using event code sequence as the triggered pattern sequence,target data sequences matching pattern sequence are captured based on Dynamic Event Warping-Boyer Moore(DEW-BM)algorithm,and calculating the measured value of each timing parameter.By verifying whether the measured value satisfies the constraint inequality,the monitoring result of timing consistency of the interface is given(Pass/Fail).The system can realize synchronous measurement and analysis of up to 16 channels,the maximum sampling rate of single channel is 20 MHz.The test results show that the monitoring system can correctly capture the target signal,the analysis result of timing consistency is consistent with the theoretical expectation,and the monitoring system has certain correctness and versatility.

关 键 词：接口时序 一致性 对比测试 时序约束 

分 类 号：TP277[自动化与计算机技术—检测技术与自动化装置]