基于FPGA的三电平APF谐波分频控制  

Three-level APF Harmonic Frequency Division Control Based on FPGA

作　　者：周京华[1] 吴杰伟[1] 王晨 张新雷 ZHOU Jinghua;WU Jiewei;WANG Chen;ZHANG Xinlei(Inverter Technologies Engineering Research Center of Beijing,North China University of Technology,Beijing 100144,China)

机构地区：[1]北方工业大学变频技术北京市工程研究中心,北京100144

出　　处：《电气传动》2020年第5期108-112,共5页Electric Drive

基　　金：国家自然科学基金面上项目(51777002);北京市高水平创新团队建设计划资助项目(IDHT20180502)。

摘　　要：针对传统串行执行方式存在可补偿谐波次数受限、补偿效果不佳等问题,研究基于现场可编程门阵列的有源电力滤波器谐波分频控制的实现。采用现场可编程门阵列作为控制系统的主控制器完成控制算法,可以显著提高计算频率,减小计算延时,改善控制系统实时性能,在现场可编程门阵列内构建并实现的谐波同步旋转坐标系下的谐波电流分频控制策略计算频率最高可达77 kHz。构建了三电平有源电力滤波器数字控制系统并在样机上进行了实验,实验结果验证了提出的现场可编程门阵列全数字谐波电流分频控制方法的正确性。Aiming at the problems that the traditional serial execution method can compensate for the limited number of harmonics and the poor compensation effect,the realization of harmonic division control of active power filters based on field programmable gate array was studied. Using FPGA as the main controller of the control system to complete the control algorithm could significantly increase the calculation frequency,reduce the calculation delay,and improve the real-time performance of the control system. The harmonic current frequency division control strategy under the harmonic synchronous rotating coordinate system constructed and implemented in FPGA could calculate a frequency up to 77 kHz.A three-level active power filter digital control system was constructed and experimented on a prototype. The experimental results verify the correctness of the FPGA all-digital harmonic current frequency division control method.

关 键 词：现场可编程门阵列 有源电力滤波器 谐波电流分频控制 数字控制系统 

分 类 号：TM28[一般工业技术—材料科学与工程]