GPU-Based Non-Binary LDPC Decoder with Weighted Bit-Reliability Based Algorithm  

作　　者：Zhanxian Liu Rongke Liu Ling Zhao 

机构地区：[1]School of Electrical and Information Engineering,Beihang University,Beijing 100191,China

出　　处：《China Communications》2020年第5期78-88,共11页中国通信（英文版）

基　　金：the National Natural Science Foundation of China (91438116)

摘　　要：In this paper, we present a graphics processing unit(GPU)-based implementation of a weighted bit-reliability based(w BRB) decoder for non-binary LDPC(NB-LDPC) codes. To achieve coalesced memory accesses, an efficient data structure for the w BRB algorithm is proposed. Based on the Single-Instruction Multiple-Threads(SIMT) programming model, a novel mapping strategy with high intra-frame parallelism is presented to improve the latency and throughput performance. Moreover, by using Single-Instruction Multiple-Data(SIMD) intrinsics, four 8-bit message elements are packed into a 32-bit unit and simultaneously processed. Experimental results show that the proposed w BRB decoder provides good tradeoff between error performance and throughput for the codes with relatively large column degrees or high rates.

关 键 词：non-binary LDPC bit-reliability GPU SIMT SIMD 

分 类 号：TN911.22[电子电信—通信与信息系统]