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作 者:赵毅强 蔡里昂[1,2] 辛睿山 甘杰 ZHAO Yiqiang;CAI Li'ang;XIN Ruishan;GAN Jie(School of Microelectronics,Tianjin University,Tianjin 300072,China;Intelligent Sensing and Chip Security Laboratory,Tianjin University,Tianjin 300072,China;Beijing Smart-Chip Microelectronics Technology Co.Ltd.,Beijing 100192,China)
机构地区:[1]天津大学微电子学院,天津300072 [2]天津大学智能感知与芯片安全实验室,天津300072 [3]北京智芯微电子科技有限公司,北京100192
出 处:《华中科技大学学报(自然科学版)》2020年第4期115-120,共6页Journal of Huazhong University of Science and Technology(Natural Science Edition)
基 金:国家电网公司总部科技项目(546816170002).
摘 要:基于三相位求值模式提出了一种三相单轨脉冲寄存器(TSPR),该寄存器可在时钟边沿到来之后依次完成放电、充电、写入三个操作.由于输出节点在每个周期内经历一次充电和一次放电操作,因此所有数据处理过程都具有相同功耗,达到了单元功耗与处理数据无关的目的.仿真验证表明TSPR逻辑功能正确,并且具有小于1.73%的归一能量差.进一步采用TSPR实现高级加密标准(AES)算法中的8位S盒结构以验证其抗差分功耗分析(DPA)攻击能力.实验结果证明:TSPR可以将正确密钥与功耗之间的相关性系数降低81.82%,有效地减少数据处理过程中的信息泄露,提高电路的抗攻击能力.A three-phase single-track pulse register(TSPR)based on the three-phase operation mode was proposed.After the arrival of the clock edge,the register sequentially could perform three operations of discharge,pre-charge and evaluate.The output node would experience exactly one charging and one discharging event per cycle,and thereby this logic could have constant energy consumption for all operational data,achieving the purpose that unit power consumption was independent of processing data.Simulations verification shows that TSPR has a correct logic function and exhibits good performances in terms of normalized energy deviation(NED),which is lower than 1.73%.An 8-bit S-box of the advanced encryption standard(AES)algorithm was implemented with TSPR to verify the differential-power-analysis-resistant of the proposed design.Experimental results prove that TSPR can reduce the correlation coefficient between the correct key and power consumption by 81.82%,which could effectively reduce the information leakage during data processing and improve the circuit's resistant.
关 键 词:脉冲寄存器 三相单轨预充电逻辑 抗差分功耗分析攻击 三相位求值 单轨
分 类 号:TN47[电子电信—微电子学与固体电子学]
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