多速率信号转换器的设计与实现  

Design and implementation of multi-rate signal converter

作　　者：汪昕 徐驰[1] 俞度立 WANG Xin;XU Chi;YU Duli(Beijing University of Chemical Technology,School of Information and Technology,Beijing 100029,China;Beijing University of Chemical Technology Center for advanced innovation in soft materials science and Engineering,Beijing 100029,China)

机构地区：[1]北京化工大学信息与技术学院,北京100029 [2]北京化工大学软物质科学与工程高精尖创新中心,北京100029

出　　处：《自动化与仪器仪表》2020年第5期63-66,78,共5页Automation & Instrumentation

基　　金：北京化工大学高精尖创新团队项目(buctylkjcx06)。

摘　　要：为提高Sigma-Delta模数转换器中数字降采样滤波器的适用范围,提出一种多速率信号转换器的设计和实现方法。在特定某款基于Sigma-Delta调制原理的MEMS加速度计系统中,其所用到的数字降采样滤波器仅能处理128 kHz固定速率的Sigma-Delta调制信号。因此,本文旨在设计一款多速率信号转换器,对多种速率输入信号进行抽取与插值转换,输出满足降采样滤波器所能处理的固定速率信号,从而满足降采样滤波器的不同应用场景。分析MATLAB仿真数据和FPGA验证结果可得,本文所设计的多速率信号转换器能够保证输出信号的通带噪声水平足够低,通带内有效信号没有发生频率偏移和幅度衰减,系统具有较高的信噪比。In order to improve the application range of the digital decimation filter which is a part of the Sigma-Delta analog-to-digital converter,a multi-rate signal converter is designed and provided an implementation method for it.In a certain accelerometer system with MEMS devices,which is based on the principle of Sigma-Delta modulation,the digital decimation filter used in it can only process signals with a fixed rate of 128 kHz.Therefore,this article aims to design a converter which can deal with certain multi-rate signals and output a fixed-rate signal that can be processed by the decimation filter in different application scenarios.After MATLAB simulation and FPGA verification,the multi-rate signal converter designed in this paper can ensure that the passband noise level of the output signal is sufficiently low,the useful signal within the passband does not have frequency offset and amplitude attenuation,and the system has a high Signal-to-Noise Ratio.

关 键 词：多速率转换器 SIGMA-DELTA调制 降采样滤波器 信噪比 

分 类 号：TP23[自动化与计算机技术—检测技术与自动化装置]