面向异构SoC的串并混合总线结构设计与研究  

Design and research of serial-parallel hybrid bus structure for heterogeneous SoC

作　　者：季永康 景乃锋 王琴[1] JI Yong-kang;JING Nai-feng;WANG Qin(School of Electronic Information and Electrical Engineering,Shanghai Jiaotong University,Shanghai 200240,China)

机构地区：[1]上海交通大学电子信息与电气工程学院,上海200240

出　　处：《信息技术》2020年第6期41-45,共5页Information Technology

基　　金：中国国家自然科学基金(61772331)。

摘　　要：串行总线具有高带宽、占用布线资源少的特点,适用于高速通信,因此文中设计了一个基于异构SoC的具有低延迟并行总线和高带宽串行总线的串并混合总线系统模型。文中还基于异构SoC中各功能单元对数据传输带宽和延迟需求不同的特点,制定了针对串并混合总线的仲裁策略,实现了仲裁器对不同类型数据包进行分配传输的过程。文中还对静态分配和动态分配两种策略的传输时间进行评估,在动态分配策略下最高可减少81.8%的传输时间,在静态分配策略下平均可减少67%的传输时间。The serial bus has the characteristics of high bandwidth and less wiring resources,which is suitable for high-speed communication.Therefore,a hybrid serial-parallel bus system model is designed based on heterogeneous SoC,which has low-latency parallel bus and high-bandwidth serial bus.Based on the characteristics of the bandwidth and latency requirements of data transmission in each functional unit of heterogeneous SoC,an arbitration strategy is developed for serial-parallel hybrid bus,which realizes the process of assigning and transmitting different types of data packets by the arbiter.The transmission time of two strategies is evaluated:static allocation and dynamic allocation.Under the dynamic allocation strategy,the transmission time can be reduced by up to 81.8%,and the average transmission time can be reduced by 67%under the static allocation strategy.

关 键 词：异构SoC 片上通信 串并仲裁 IP仲裁 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]