基于FPGA的时钟同步功耗信息采集方法  

FPGA-based Collection Method for Power Information of Clock Synchronization

作　　者：宋安 王琴[1] 谷大武[1] 郭筝[1,2] 刘军荣[1,3] 张驰 SONG An;WANG Qin;GU Dawu;GUO Zheng;LIU Junrong;ZHANG Chi(School of Electronic Information and Electrical Engineering,Shanghai Jiao Tong University,Shanghai 201100,China;School of Cyber Science and Engineering,Shanghai Jiao Tong University,Shanghai 201100,China;ZhiXun Crypto Testing and Evaluation Technology Co.,Ltd.,Shanghai 201100,China)

机构地区：[1]上海交通大学电子信息与电气工程学院,上海201100 [2]上海交通大学网络空间安全学院,上海201100 [3]智巡密码(上海)检测技术有限公司,上海201100

出　　处：《计算机工程》2020年第6期115-121,共7页Computer Engineering

基　　金：闵行区中小企业技术创新计划“基于区块链技术的金融业务平台”(2018MH110)。

摘　　要：传统的异步采集方法会影响采集到的功耗信息的信噪比,降低功耗分析的成功率。针对异步采集的问题,提出一种新的时钟同步功耗信息采集方法。该采集方法基于现场可编程门阵列(FPGA)的时钟同步采集平台,利用基于FPGA时钟同步设备向待采集设备和示波器发送同步的时钟信号,使采集过程中的待采集设备与示波器的工作状态同步。在此基础上运用电气解耦原理,隔离外部信号对待采集设备的影响,改善功耗信息的信躁比。通过相关功耗分析进行实验验证,结果表明,该方法采集效率最高提升66.7%,明显提高功耗分析的成功率。Traditional asynchronous acquisition method affects the signal-to-noise ratio of collected power information information,resulting in a decrease in the success rate of power information analysis.To address the problem of asynchronous acquisition,this paper proposes a new power information collection method for clock synchronization.Based on the clock synchronization collection platform of the Field Programmable Gate Array(FPGA),this method uses clock synchronization based devices to send a clock signal of synchronization to the to-be-collected device and the oscilloscope,so that the to-be-collected device is synchronized with the working state of the oscilloscope.The principle of electrical decoupling is used to isolate the influence of external signals on the to-be-collected device,and improves the signal-to-noise ratio of the power consumption information.Through Correlation Power Analysis(CPA),result shows that the proposed method improves the collection efficiency by up to 66.7%,greatly improving the success rate of power analysis.

关 键 词：旁路攻击 功耗分析 现场可编程门阵列 时钟同步采样 电气解耦 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]