基于Vaq的高能效电容拆分结构DAC开关算法  

Vaq-based capacitor-splitting DAC switching algorithms with high energy-efficiency for SAR ADCs

作　　者：王浩 陈知新[1,2] 谢文明 陈天玮[1] WANG Hao;CHEN Zhixin;XIE Wenming;CHEN Tianwei(School of Information Science and Engineering, Fujian University of Technology, Fuzhou, 350118, China;Research Center for Microelectronics Technology, Fujian University of Technology, Fuzhou 350108, China)

机构地区：[1]福建工程学院信息科学与工程学院,福建福州350118 [2]福建工程学院微电子技术研究中心,福建福州350118

出　　处：《福建工程学院学报》2020年第3期255-259,共5页Journal of Fujian University of Technology

基　　金：福建工程学院科研发展基金(GY-Z14072,GY-Z18182);福建省教育厅基金(JAT170372)。

摘　　要：提出了一种应用于逐次逼近型模数转换器(successive approximation register analog-to-digital converters,SAR ADC)的小面积高能效电容拆分结构DAC开关算法。在最后两个位转换周期中引入了第三参考电压Vaq(VREF/4),降低了开关能耗和电容面积。为了进一步降低开关能耗,除了第一、第二和倒数第二个位转换周期外,整个转换过程都采用了单边双电平开关算法。与单调结构开关算法相比,该开关算法能耗减少了98.45%,电容面积减少了75%。同时进行线性度分析,微分非线性(differential nonlinearity,DNL)和积分非线性(integral nonlinearity,INL)分别为0.324LSB和0.243LSB,验证了电容失配对ADC的精度影响很小。因此,文章所提出的DAC开关算法在能耗、电容面积和ADC精度之间具有很好的折衷性。An area-efficient high-efficiency capacitor-splitting switching algorithm for successive approximation register(SAR)analog-to-digital converters(ADCs)was proposed.The third voltage reference Vaq(VREF/4)was introduced during the last two bit cycles,leading to low power consumption and capacitor area.To further reduce the switching energy,the one-side double-level switching method was utilized during the entire bit cycles except the first,second and the last but one.Compared with the monotonic one,the proposed capacitor switching method achieves 98.45%energy saving and 75%capacitor area reduction,respectively.Meanwhile,the linearity analysis was performed,and DNL and INL were 0.324LSB and 0.243LSB,respectively,which verifies the minimum effect of capacitor mismatch on SAR ADC accuracy.Thus,the proposed switching scheme is a good trade-off among the energy-efficiency,capacitor area and accuracy of the ADC.

关 键 词：电容 有效面积 开关算法 高精度 基于Vaq 拆分电容技术 

分 类 号：TN43[电子电信—微电子学与固体电子学]