检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:于忠吉[1] 张兴稳 孙彪[1] YU Zhong-ji;ZHANG Xing-wen;SUN Biao(The 723 Institute of CSIC,Yangzhou 225101,China)
机构地区:[1]中国船舶重工集团公司第七二三研究所,江苏扬州225101
出 处:《舰船电子对抗》2020年第3期97-101,共5页Shipboard Electronic Countermeasure
摘 要:提出了一种K波段超低杂散捷变频频合器设计方案。该频率合成方案采用混合频率合成模式,直接数字频率合成器(DDS)产生200~300 MHz低杂散中频信号,经过2次上变频、分段滤波、放大后扩展为宽带、低杂散、捷变频频合器。对其进行了理论分析和ADS仿真模型验证。实测该频合器输出杂散小于-75 dBc,频率切换时间小于150 ns,输出功率大于15 dBm,带宽4 GHz,步进1 MHz,20 GHz载波处相噪约-104 dBc/Hz@1kHz。该频合器不仅可广泛应用于雷达、对抗、通信等领域,也为其他类似需求频合器提供了参考。This paper proposes the design scheme of a K-band ultralow spur agile frequency synthesizer.Hybrid frequency synthesis mode is adopted.The direct digital synthesizer(DDS)generates low spur intermediate frequency signal of 200 MHz^300 MHz,and extends to a broadband low spur agile frequency synthesizer through twice up-conversion,segmented filtering and amplifying.The theory is analyzed and validated through ADS simulation model.Measured results show that the output spur of synthesizer is below-75 dBc,frequency switching time is less than 150 ns,output power is more than 15 dBm,bandwidth is 4 GHz,step is 1 MHz,and the phase noise is about-104 dBc/Hz@1 kHz at 20 GHz carrier.This synthesizer not only can be applied to radar,electronic countermeasure,communication,etc,but also offers the reference for other synthesizers with similar requirements.
分 类 号:TN74[电子电信—电路与系统]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:216.73.216.222