一种高性能可编程增益运放电路设计  

Design of a High Performance Programmable Gain Operational Amplifier Circuit

作　　者：张金旭 李珂[1] 吴波 ZHANG Jinxu;LI Ke;WU Bo(The NO.58 Research Institute of China Electronics Technology Group Corp,Wuxi,Jiangsu,214000,CHN;College of Microelectronic,Xidian University,Xi'an,710071,CHN)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214000 [2]西安电子科技大学微电子学院,西安710071

出　　处：《固体电子学研究与进展》2020年第3期219-225,共7页Research & Progress of SSE

摘　　要：设计了一种应用于双电源系统的可编程增益运放电路。主要结构包括:偏置电路、控制缓冲电路、主运放电路以及增益控制电路。控制缓冲电路调节电路的工作状态,并且加入传输门模拟开关增加隔离度;偏置电路为控制缓冲电路提供恒定的电流,增强整个电路的稳定性;主运放电路为两级跨导差分结构,采用CSMC 0.5μm ST3000CMOS工艺进行设计,并对电路进行了仿真,其结果显示:开环增益为79 dB,增益带宽为130 MHz,相位裕度为78°,压摆率为756 V·μs-1。基于这种高性能的运放电路,通过接入负反馈电阻分压来实现AV=1或AV=2的增益切换。A programmable gain operational amplifier(op amp)circuit for dual power systems was designed in this paper.The main structure includes:bias circuit,control buffer circuit,main operational amplifier circuit and gain control circuit.The control buffer circuit adjusts the working state of the circuit and adds a transmission gate analog switch to increase the isolation;the bias circuit provides a constant current for the control buffer circuit and enhances the stability of the entire circuit;the main op amp circuit is a two-stage transconductance differential structure.The circuit is designed by CSMC0.5μm ST3000 CMOS process and the circuit is simulated.The results show that the open-loop gain is 79 dB,the gain bandwidth is 130 MHz,the phase margin is 78°,and the slew rate is 756 V·μs-1.Based on this high-performance op amp circuit,gain switching of AV=1 or AV=2 is achieved by accessing a negative feedback resistor divider.

关 键 词：运放 可编程增益 稳定性 

分 类 号：TN433[电子电信—微电子学与固体电子学]