低成本SerDes在数据采集中的方案设计与应用  

Design and application of low-cost SerDes in data acquisition

作　　者：文科[1] 朱正[1] 马敏舒 Wen Ke;Zhu Zheng;Ma Minshu(Sichuan Institute of Solid-State Circuits,China Electronics Technology Group Corp,Chongqing 400060,China)

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《电子技术应用》2020年第8期88-91,共4页Application of Electronic Technique

摘　　要：介绍了低成本的1 Gb/s源同步SerDes接口应用原理,并详细阐述了低端FPGA如何与高速数据接口以及如何实现对1 Gb/s数据的可靠采样的解决方案。该接口适用于AD9653等源同步SerDes接口的数据转换器。再配合Spartan-6系列等低端FPGA的应用,可以大大降低数据采集系统的成本、功耗和复杂度。This paper introduces the low cost of 1 Gb/s source-synchronous SerDes interface application principle,and how to interface low-end FPGA with high-speed data and how to implement a reliable sampling solution for 1 Gb/s data are described in detail.This interface is suitable for source-synchronous SerDes data converter as AD9653.Coupled with application of the low-end Spartan-6 series FPGA,this solution can greatly reduce the cost of data acquisition system,power consumption and complexity.

关 键 词：1Gb/s采样对准 AD9653 Spartan-6 

分 类 号：TN98[电子电信—信息与通信工程]