多模态信号发生器设计与仿真  

Design and Simulation of Multi-modal Signal Generator

作　　者：雷红 黄懿赟[1] 潘圣民 陆伟 Lei Hong;Huang Yiyun;Pan Shengmin;Lu Wei(Hefei Institutes of Physical Science,Chinese Academy of Sciences,Hefei 230031,China;University of Science and Technology of China)

机构地区：[1]中国科学院合肥物质科学研究院,合肥230031 [2]中国科学技术大学

出　　处：《单片机与嵌入式系统应用》2020年第9期79-81,共3页Microcontrollers & Embedded Systems

摘　　要：提出一种以Xilinx FPGA为基础、运用Verilog语言设计了一款频率可调节的信号发生器,通过UART串行通信接口实现远距离波形输出和调节,该设计实现了正弦波、三角波、方波等波形输出设计,分析了利用FPGA实现直接数字频率合成技术原理和优点,主要指标达到输出频率范围在1 Hz^100 MHz的频率可调节输出,杂波抑制电平小于-70 dBc,频率分辨力小于10 Hz的性能指标。通过示波器显示和Vivado仿真工具进行仿真波形验证,该系统满足设计要求。In the paper,a frequency-adjustable signal generator based on Xilinx FPGA is proposed,and Verilog language is used to realize long-range waveform output and adjustment through UART serial communication interface.The design realizes sine wave,triangle wave,square wave and other waveforms.The output design analyzes the principle and advantages of using FPGA to implement Direct Digital Synthesis(DDS).The main indicators are adjustable output with a frequency range of 1 Hz^100 MHz,and the clutter suppression level is less than-70dBc.The performance with resolution less than 10 Hz.The oscilloscope display and Vivado simulation tools are used to verify the simulation waveforms.The system meets the design requirements.

关 键 词：DDS FPGA Verilog HDL语言 数字信号发生器 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]