“并与”、“串或”方法快速求解CMOS逻辑门电路输出结果  

Fast Solution of CMOS Logic Gate Circuit Output by “Parallel-AND”Method and“Series-OR”Method

作　　者：袁文[1] 王凌燕 刘明 徐涛 王江山 YUAN Wen;WANG Ling-yan;LIU Ming;XU Tao;WANG Jiang-shan(School of Physics and Communication Electronics,Jiangxi Normal University,Nanchang 330022,China)

机构地区：[1]江西师范大学物理与通信电子学院,江西南昌330022

出　　处：《南昌师范学院学报》2020年第3期12-15,共4页Journal of Nanchang Normal University

基　　金：江西省教改课题,编号:JXJG-18-2-12。

摘　　要：文章对于分析CMOS逻辑门电路输出端写出逻辑函数式的问题,从“线与”的概念出发,提出“并与”、“串或”的分析方法,来简化CMOS逻辑门电路逻辑功能的分析过程,从而快速得到输出端逻辑函数式。这种方法为简单明了地总结CMOS逻辑门电路的逻辑功能,提供了一定的解题方法及思考。This paper analyzes the problem of writing out the logic function at the output terminal of the CMOS logical gate circuit.With the introduction of“Line-AND”concept,“Parallel-AND”Method and“Series-OR”Method were proposed to simplify the analysis process of the logic function of the CMOS logic gate circuit,so as to quickly obtain the output logic function.These methods provide a simple and clear summary as well as some solutions of the logic functions of CMOS logic gate circuit.

关 键 词：集成逻辑门 CMOS逻辑电路 并与 串或 

分 类 号：G642[文化科学—高等教育学]