基于SET的最佳通用逻辑门ULG.2电路优化设计  

Optimized design of the optimal universal logic gate ULG.2 circuit based on SET

作　　者：王芳[1] 孔伟名 应时彦[2] 乔天泽 WANG Fang;KONG Weiming;YING Shiyan;QIAO Tianze(Department of Film and TV Technology,Zhejiang Vocational Academy of Art,Hangzhou 310053,China;College of Information Engineering,Zhejiang University of Technology,Hangzhou 310023,China)

机构地区：[1]浙江艺术职业学院影视技术系,浙江杭州310053 [2]浙江工业大学信息工程学院,浙江杭州310023

出　　处：《浙江工业大学学报》2020年第5期570-573,共4页Journal of Zhejiang University of Technology

基　　金：浙江省自然科学基金资助项目(Y1110808)。

摘　　要：单电子晶体管具有功耗超低、集成度超高以及与传统的CMOS电路相兼容等优点,是制造新一代集成电路最具竞争力的纳米器件之一。基于SET的最佳通用逻辑门ULG.2与传统的逻辑门相比,优势尤为明显。在介绍逻辑门ULG.2原理的基础上,提出了基于SET的最佳通用逻辑门ULG.2的电路优化设计,利用ULG.2设计了全比较器和全加/减器,并对电路进行PSpice仿真。结果表明:基于SET的最佳通用逻辑门ULG.2及其应用电路结构简单,具有晶体管数少,电路功耗和延迟小的特征。Single-electron transistor has the advantages of ultra-low power consumption,ultra-high integration level and compatibility with traditional CMOS circuits.It is one of the most competitive nano devices for manufacturing new generation integrated circuits.Compared with traditional logic gates,the SET-based optimal universal logic gate ULG.2 has obvious advantages.On the basis of introducing the principle of logic gate ULG.2,the optimal circuit design of universal logic gate ULG.2 based on SET is proposed.All comparators and all adders/subtractors are designed using ULG.2,and the circuit is simulated according to PSpice.The results show that the optimal universal logic gate ULG.2 based on SET and its application circuit have the characteristics of simple structure,small number of transistors,low circuit power consumption and delay.

关 键 词：单电子晶体管 通用逻辑门 全比较器 全加/减器 

分 类 号：TP331[自动化与计算机技术—计算机系统结构]