可重构逻辑门电路的设计与仿真  

Design and Simulation of reconfigurable logic gate circuit

作　　者：陈夏寅 刘高飞 彭菊红 李培文 付迅 Chen Xiayin;Liu Gaofei;Peng Juhong;Li PeiWen;Fu Xun(School of Computer and Information Engineering,Hubei University,Wuhan 430062,China)

机构地区：[1]湖北大学计算机与信息工程学院,湖北武汉430062

出　　处：《信息通信》2020年第7期114-116,共3页Information & Communications

基　　金：大学生创新创业项目编号:201710512009;校级教研项目编号:201935。

摘　　要：文章设计出一种基于忆阻器的可重构逻辑门电路,并利用忆阻器的SPICE模型,对设计的电路进行了仿真验证。该电路单元可实现多种基本逻辑运算,在此单元电路基础上设计了3线-8线译码器的电路。可重构逻辑门电路结构简单,可实现多种逻辑运算,节约了硬件设计的资源,提高了设计的灵活性,并具有数据存储的功能,可为存储计算的硬件设计提供一些参考。A reconfigurable logic gate circuit based on memristor is designed, and the spice model of memristor is used to simulate and verify the designed circuit. The circuit unit can realize a variety of basic logic operations. Based on the unit circuit, the circuit of 3-8 line decoder is designed. The reconfigurable logic gate has simple structure, can realize many kinds of logic operations, save the resources of hardware design, improve the flexibility of design, and has the function of data storage, which can provide some reference for the hardware design of storage computing.

关 键 词：忆阻器 可重构电路 SPICE模型 3线-8线译码器 数据存储 

分 类 号：TN791[电子电信—电路与系统]