SAR成像处理系统及其数据通信设计  

SAR Imaging Processing System and Data Communication Design

作　　者：刘全威[1] 宋芹 刘嘉杰 李莉[1] LIU Quan-wei;SONG Qin;LIU Jia-jie;LI Li(No.43 Research Institute of CETC,Hefei 230088,China)

机构地区：[1]中国电子科技集团公司第四十三研究所,安徽合肥230088

出　　处：《混合微电子技术》2019年第4期37-41,共5页Hybrid Microelectronics Technology

摘　　要：针对基于国产数字信号处理器(DSP)、可编程逻辑器件(FPGA)的标准通用SAR成像处理系统,介绍系统硬件电路拓扑设计,详细分析高速数据通信模块程序开发。高速数据通信采用全链路拓扑结构,在系统中可扩展性好、效率高。This paper introduces the hardware topology design of the standard general-purpose SAR imaging processing system based on domestic DSP and FPGA,and analyzes the program development of high-speed data communication module in detail.High speed data communication adopts the whole link topology structure,which has good scalability and high efficiency in the system.

关 键 词：实时成像 数据通信 DSP FPGA 

分 类 号：TN957.52[电子电信—信号与信息处理]