L-DSP片上Flash控制器设计与实现  

Design and Implementation of L-DSP On-chip Flash Controller

作　　者：曹韬 邹望辉 汪东 CAO Tao;ZOU Wanghui;WANG Dong(School of Physics&Electronic Science,Changsha University of Science&Technology,Changsha 410005,China;Hunan GREAT-LEO Microelectronic Co.,LTD.,Changsha 410005,China)

机构地区：[1]长沙理工大学物理与电子科学学院,长沙410114 [2]湖南毂梁微电子有限公司,长沙410005

出　　处：《智能计算机与应用》2020年第6期142-147,共6页Intelligent Computer and Applications

摘　　要：根据L-DSP芯片系统架构,针对所选用的片上Flash存储器,设计片上Flash控制器模块,实现了总线与片上Flash的正常通信,并能够根据系统运行频率调整到最快读取速率。控制器还拥有连续指令预取功能,大幅提高了连续取指程序的运行效率,以及Flash初始坏块替换修复模块,提高芯片出厂良率。仿真结果表明:在额定150 MHz频率下,运行效率提高了17.611%;控制器模块在0.18μm CMOS工艺下,面积为0.13 mm^2,功耗为10.17 mW。利用FPGA对L-DSP全芯片进行验证,确保控制器功能正确。According to the L-DSP chip system architecture,an on-chip Flash controller module is designed for the selected on-chip Flash memory,realizing the normal communication between the bus and the on-chip Flash,and can be adjusted to the fastest read rate according to the system operating frequency.The controller also has a continuous instruction pre-fetch function,which greatly improves the running efficiency of the continuous instruction fetch program,and the Flash initial bad block can be replaced by the repair module in controller to improve the rate of good chip.Simulation results show that the operating efficiency is increased by 17.611%at the rated frequency of 150 MHz.The integrated area of the controller module under the 0.18μm CMOS process is 0.13 mm^2,and the power consumption is 10.17 mW.Finally,FPGA is used to verify the L-DSP full chip to ensure the correct function of the controller.

关 键 词：片上Flash 读取速率 指令预取 坏块替换 

分 类 号：TP39[自动化与计算机技术—计算机应用技术]