A comparative study of digital low dropout regulators  

作　　者：Mo Huang Yan Lu Rui P.Martins 

机构地区：[1]State Key Laboratory of Analog and Mixed-Signal VLSI,Institute of Microelectronics,DECE/FST,University of Macao,Macao,China [2]On leave from the Instituto Superior Técnico,Universidade de Lisboa,Lisbon,1049-001,Portugal

出　　处：《Journal of Semiconductors》2020年第11期52-60,共9页半导体学报（英文版）

基　　金：supported by the National Natural Science Foundation of China(No.61974046);the Provincial Key Research and Development Program of Guangdong(2019B010140002);the Macao Science&Technology Development Fund(FDCT)145/2019/A3 and SKL-AMSV(UM)-2020-2022.

摘　　要：Granular power management in a power-efficient system on a chip(SoC)requires multiple integrated voltage regulators with a small area,process scalability,and low supply voltage.Conventional on-chip analog low-dropout regulators(ALDOs)can hardly meet these requirements,while digital LDOs(DLDOs)are good alternatives.However,the conventional DLDO,with synchronous control,has inherently slow transient response limited by the power-speed trade-off.Meanwhile,it has a poor power supply rejection(PSR),because the fully turned-on power switches in DLDO are vulnerable to power supply ripples.In this comparative study on DLDOs,first,we compare the pros and cons between ALDO and DLDO in general.Then,we summarize the recent DLDO advanced techniques for fast transient response and PSR enhancement.Finally,we discuss the design trends and possible directions of DLDO.

关 键 词：low dropout regulator(LDO) digital control fast transient response power supply rejection(PSR) integrated voltage regulator 

分 类 号：TN47[电子电信—微电子学与固体电子学] TM44[电气工程—电器]