嵌入式可重构信号处理计算机设计技术  

Design technology of embedded reconfigurable signal processing computer

作　　者：赵谦 邓豹 刘婷婷 ZHAO Qian;DENG Bao;LIU Ting-ting(Xi’an Aeronautical Computing Technique Research Institute,Aviation Industry Corporation of China,LTD,Xi’an 710068,China)

机构地区：[1]中国航空工业集团公司西安航空计算技术研究所,陕西西安710068

出　　处：《计算机工程与设计》2020年第11期3289-3293,共5页Computer Engineering and Design

基　　金：航空科学基金项目(2018ZC31002)。

摘　　要：为提高嵌入式信号处理计算机的硬件资源利用率,减小体积、重量和功耗(size,weight and power,SWaP)开销,基于嵌入式SOC下的动态可重构技术,提出一种可重构信号处理计算机系统架构,探讨可重构信号处理计算机原型的系统架构、重构方式和控制方法。通过典型算法对原型系统进行功能验证和性能评估(对实时性和资源利用率提升比进行量化分析),其结果表明,可重构信号处理计算机满足嵌入式信号处理系统的实时性要求,能有效提高硬件资源的利用率。To reduce the SWaP(size,weight and power)overhead of embedded signal processing computer and to improve the utilization of hardware resources,based on the dynamic reconfiguration technology under embedded SOC,a reconfigurable signal processing computer architecture was proposed,and the architecture,reconfiguration-pattern and control-method of the computer prototype were explored.The prototype system was validated and evaluated through typical algorithms,specifically the real-time performance and resource utilization ratio were quantitatively analyzed.The results show that the reconfigurable signal proces-sing computer can meet the real-time requirements of embedded signal processing system,and can effectively improve the utilization of hardware resources.

关 键 词：嵌入式计算机 信号处理 嵌入式SOC 动态可重构 资源利用率 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]