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作 者:戴永红[1] 徐代果[2] 蒲杰[2] 徐世六[2] 张建平 张俊安[2] 王健安[2] DAI Yonghong;XU Daiguo;PU Jie;XU shiliu;ZHANG Jianping;ZHANG Jun’an;WANG Jiang’an(The 24th Research Institute of China Electronics Technology Group Corporation,Chongqing 400060,P.R.China;Science and Technology on Analog Integrated Circuit Laboratory,Chongqing 400060,P.R.China)
机构地区:[1]中国电子科技集团公司第二十四研究所,重庆400060 [2]模拟集成电路国家重点实验室,重庆400060
出 处:《微电子学》2020年第5期653-658,共6页Microelectronics
基 金:重庆市科技局科研基金资助项目(stc2018jszx-cyztzx0204,stc2018jszx-cyztzx0206)。
摘 要:提出了一种采用采样开关线性增强技术的12位100 Ms/s SAR模数转换器(ADC)。首先采用了一种基片浮动技术,随着输入信号的变化,采样开关的寄生电容变化减小,总寄生电容降低。其次采用了一种采样开关基片升压技术,降低了采样开关的导通阻抗。最后,采用40 nm CMOS工艺制作了一种12位100 MS/s SAR ADC。测试结果表明,在电源电压1 V下,该ADC的SNDR为64.9 dB,SFDR为83.2 dB,消耗功率为2 mW。该ADC的核心电路尺寸为0.14μm×0.14μm。FoM值为13.8 fJ/(conv·step)@Nyquist频率。A 12-bit 100-MS/s SAR ADC with sampling switch linearity enhanced technique was proposed.First,a substrate floating technique was proposed.With the variation of input signals,the parasitic capacitance variation of sampling switch had been reduced,and the total parasitic capacitance had been also depressed.Secondly,the substrate boost technology of sampling switch was proposed,and the on-impedance of sampling switch had been decreased.Finally,a 12 bit 100 MS/s SAR ADC was fabricated in a 40 nm CMOS technology.The test results showed that the SNDR was 64.9 dB,the SFDR was 83.2 dB,and the consuming power was 2 mW at 1 V power supply.The core cell size of the ADC was 0.14μm×0.14μm.The FoM value was 13.8 fJ/conversion-step at Nyquist frequency.
分 类 号:TN792[电子电信—电路与系统]
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