基于UVM的AHB-UART模块验证  

AHB-UART Verification Based on UVM

作　　者：王兴耀 戴宇杰[1] Wang Xingyao;Dai Yujie(College of Electronic Information and Optical Engineering,Nankai University,Tianjin 300350,China)

机构地区：[1]南开大学电子信息与光学工程学院,天津300350

出　　处：《南开大学学报（自然科学版）》2020年第5期82-86,共5页Acta Scientiarum Naturalium Universitatis Nankaiensis

摘　　要：对于SOC上应用十分普遍的AMBA总线而言,传统的验证方法已经远不能满足需求,使用UVM方法对AHB总线和UART模块之间的通信进行了统一的功能验证.验证结果覆盖了所有的测试点,并表明该验证平台具有很好的可重用性.With the continuous expansion of integrated circuit's scale,the complexity and workload of the SOC(system on chip)verification is increasing apace.Verification is becoming the most important link in the development of a chip.For the AMBA(advanced microcontroller bus architecture)protocol which is widely used in the SOC,traditional method cannot meet the requirement of verification,the mainstream verification methodology UVM(universal verification methodology)is introduced and verified the function of AHB—UART with this methodology.The result of the verification covers all the test points and illustrates that the verification platform is well reusable.

关 键 词：UVM AHB总线 UART 覆盖率 可重用 

分 类 号：TN47[电子电信—微电子学与固体电子学]