一种小型化可重构分频电路设计  

Design of a compact divided frequency circuit with reconfigurable ratio

作　　者：陈彬 叶翔 许伟民 李春早 Chen Bin;Ye Xiang;Xu Weimin;Li Chunzao(The Institute of LeiHua Electronic Technology Research of AVIC,Wuxi 214063,China)

机构地区：[1]中国航空工业集团公司雷华电子技术研究所,无锡214063

出　　处：《电子测量技术》2020年第16期37-40,共4页Electronic Measurement Technology

摘　　要：在雷达调试过程中需要多种相参时钟信号,而相参信号多是通过分频电路对现有频率源或定时模块的输出分频而实现。为此,出了一种小型化可重构功分分频电路,由功分器、分频器、电源变换器、拨码开关等集成,具有8-511连续可调的分频比,能对DC-14 GHz的超宽带内的点频信号或差分脉冲定时信号进行分频处理;具有大范围电压输入,适用于5~20 V直流电压输入;同时,分频电路输出信号对信号源仪器进行外同步触发,可使信号源输出各种相参波形。该电路可用于雷达接收机时序调整、相位校正、数字下变频功能验证、系统联试等,满足雷达调试使用需求。A variety of coherent clock signals, which are mostly achieved by dividing the output of the existing frequency source or timing module by the frequency dividing circuit, are required in the radar debugging. To meet these needs, a miniaturized reconfigurable power and frequency divider is proposed in this paper. The circuit integrated by a power divider, frequency divider, power converter, DIP switch, etc., it can divide the frequency signal or differential pulse timing signal within the ultra-wideband of DC-14 GHz with a continuously adjustable frequency division ratio of 8-511, has a wide range of voltage input covering 5~20 V DC voltage input, meanwhile, the frequency-divided signal output from this circuit can used as the external synchronous trigger to make the signal source to produce various coherent waveforms. In the respects of receiver timing adjustment, phase correction, digital down-conversion function verification, system joint test, etc., the circuit can be used to meet those needs of radar debugging.

关 键 词：分频器 可重构 连续分频比 

分 类 号：TN85[电子电信—信息与通信工程]